1. Field of Invention
The present invention relates to the field of address allocation, and more specifically to a device requiring address allocation, a device system and an address allocation method.
2. Description of Related Arts
In an existing device connected based on a bus, generally only an address register is disposed to store address information, and a matching device such as a coder is used to write allocated address information to the address register.
For example, a device system shown in FIG. 1 includes a master controller, a device 1, a device 2, . . . , and a device n connected based on a bus. Before the devices 1, 2, . . . , and n connected in parallel on the bus communicate with the master controller, the coder writes addresses one by one, so that the devices 1, 2, . . . , and n can correctly receive information transmitted thereto from the master controller through the bus based on the address information stored in the address registers thereof.
For another example, a memory module shown in FIG. 2 includes a plurality of data buffers and a control buffer connected through a bus. When a tester needs to test or calibrate one or more data buffers, a matching memory controller often needs to be used to allocate address information to each data buffer respectively, and then each data buffer receives command information or control information from the bus based on the address information stored in the address register thereof, so as to determine whether each data buffer can work normally. Obviously, such a testing or calibration method is inconvenient for memory module manufacturers who have to prepare matching memory controllers by themselves.
It can be seen from the above that, due to the structural limitation of the existing device, address allocation cannot be implemented without a matching device, making it rather inconvenient to allocate addresses.